(Not Applicable)
Many radar applications, including synthetic aperture radar (SAR), require fine range resolution. A simplistic method of achieving fine range resolution is to transmit a very narrow pulse and adequately sample the returned echo. This method, while simple in theory, has some practical limitations: very high peak transmitter power and very high bandwidth for an analog-to-digital (A/D) converter.
Pulse compression is one known radar technique for reducing peak transmitter power while maintaining a fixed average transmitter power by coding the transmitted waveform in such a manner as to be able to decode the received echo into the various constituents of the transmitted code.
Some pulse compression schemes, such as binary and polyphase codes, literally change the phase of the transmitted signal at regular sub-pulse intervals. The length of these sub-pulse intervals determines the achievable range resolution.
Another pulse compression scheme involves continuously varying the phase of the transmitted waveform. When this phase variation is quadratic (and, therefore, the frequency variation is linear), the method is called linear FM pulse, or chirp pulse compression. Such a waveform is described by:
y(t)=sin({2xcfx80(f0t+0.5kt2+xcfx860)}, 0xe2x89xa6txe2x89xa6xcfx84xe2x80x83xe2x80x83eq. 1
where k is the linear chirp rate, xcfx84 is the pulse length, and f0 and xcfx860 are the starting frequency and phase of the waveform, respectively.
A preferred technique for implementing chirp pulse compression utilizes the direct-digital-synthesis (DDS) circuitry of prior art FIG. 1 to generate y(f). Conventional frequency accumulator 2 includes an adder 32 in series with a register 34 and a feedback loop 36 from the output of register 34 to the input through adder 32. This circuit accumulates, or integrates, the chirp rate constant, k, and adds it to a programmed starting frequency f0 (which had been loaded into register 34) to provide an output f(t)=f0+kt, the instantaneous frequency. This output is used as the input to phase accumulator 4 where the linear frequency term is integrated to provide an output xcfx86(t)=f0txe2x88x92kt/2+kt2/2+xcfx860, the instantaneous phase. The combination of these first two accumulators is collectively known as the phase generator PG. The output of phase accumulator 4 is applied as an address to a mapping device such as look-up table ROM 6 which contains one cycle of a sine. The resulting output of ROM 6 takes the form of equation 1. This circuit is recognizable as the digital portion of a conventional DDS (formed by phase accumulator 4, look-up table ROM 6), with the addition of a frequency accumulator 2 at the input to provide for the changing frequency of the chirp generator. The output of look-up table ROM 6 is fed through a D/A converter 7 to provide an analog signal for transmission by a radar. The phase error correction look up table (PEC LUT) 8 is an important part of most modem chirp synthesizers that compensates for non-linearity""s in RF components of a radar in a manner known to those of ordinary skill in the art.
The advantages of this design include a waveform length independent of hardware configuration, ease of changing waveform parameters, a capability of generating a continuous, constant frequency (CW) sinusoid, and a small part count. To change waveform parameters, all that is required is to change the values for the starting frequency f0, the starting phase xcfx860, and the chirp rate k, all of which values are stored in registers. Pulse length, xcfx84, is also programmable. If desired, these parameters may be changed on a pulse by pulse basis. Since a chirp radar system requires two waveforms, one for use during transmit and a second for use during receive, the wave form synthesizer (WFM) chirp generator of FIG. 1 may be used with the starting frequency and pulse duration for each pulse loaded into different registers to permit independent specification of the transmit and receive waveforms.
The implementation of the chirp generator of FIG. 1 may take many embodiments. However, this generator, and DDS systems in general, are limited in output to about 50% of the clock frequency because of the Nyquist sampling theorem. To generate an output frequency on the order at a sampling rate of 1 GHz, prior art systems have utilized expensive, high power, custom made GaAs integrated circuits. (See, for example, B. Redmund et al., A 500 MHz Phase Generator for Synthetic Aperture Radar Waveform Synthesizers, Sandia National Laboratories publication SAND 91-0966C, July 1991.)
It is an object of this invention to provide a high frequency chirp circuit utilizing commercially available components. This and other objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
To achieve the foregoing and other objects, and in accordance with the purpose of the present invention, as embodied and broadly described herein, the present invention may comprise a synthesizer for generating a desired chirp signal comprising M parallel channels, where M is an integer greater than 1, each channel including a chirp waveform synthesizer generating at an output a portion of a digital representation of the desired chirp signal; and a multiplexer for multiplexing the M outputs to create a digital representation of the desired chirp signal. Preferably, each channel receives input information that is a function of information representing the desired chirp signal.